At present, a technique for a semiconductor integrated circuit has been developed indeed at an amazingly-level of high speed. Such surprising grade, amount, and level of development is largely owing to fine-element promotion planning. The fine-element promotion enables integration of more elements within one chip, and as a result, more functions per chip can be realized. One more large effect by the fine-element promotion is to realize a high speed. A current and voltage formula in a saturated region of MOSFET is expressed by the following equation (2). EQU I.sub.D =(W/2L).multidot..mu..sub.c .multidot.C.sub.0x (V.sub.G - V.sub.VH).sup.2 ( 2)
where,
C.sub.0x =(.epsilon..sub.0 .multidot..epsilon..sub.r)/d.sub.0x PA1 W: gate width PA1 L: gate length PA1 .mu..sub.c : channel mobility PA1 C.sub.0x : gate oxide film capacitance per unit area PA1 V.sub.G : gate voltage PA1 V.sub.TH : threshold voltage PA1 .epsilon..sub.0 : dielectric constant of vacuum PA1 .epsilon..sub.r : dielectric constant of gate insulating film PA1 d.sub.0x : film thickness of gate insulating film
and
Assume that a dimension of the device is scaled down at a rate of .alpha. times (.alpha.&lt;1). Even when a gate width W and a gate length L are reduced at a rate of .alpha. times, a drivable drain current I.sub.D does not vary. However if a thickness D.sub.0x of a gate insulating film is reduced at a rate of .alpha. times, a capacitance Cox of the gate insulating film goes at a rate of 1/.alpha. times, and a drivable drain current I.sub.D increases at a rate of 1/.alpha.. Further, a load capacitance (normally, a gate capacitance on next stage) driven by this transistor is expressed by C.sub.0x .multidot.L.multidot.W, and lowered at a rate of .alpha.. Therefore, the required time for charging and discharging the load capacitance is sharply reduced at a rate of .alpha..sup.2 times. Thus, improvement of the current driving capability and reduction of the load capacitance in respect of elements following the fine promotion have achieved the high speed operation.
However, realization of the fine-promotion policy is slowing down recently, where plane dimensions of the gate length L and the like reach 0.5 to 0.2 .mu.m that is a theoretical limit value of pattern forming by light. For the gate insulating film, silicon thermal oxide film SiO.sub.2 is ordinarily used, but its film thickness comes as thin as approximately 5 nm. This designates approximation to the limit value of the fine promotion process. For the pattern dimension, a dimension therefor equal to or less than 0.1 .mu.m is intended by the use of X ray or electron beam, this now is in gradually obtaining satisfactory result.
However for the gate insulating film, leaving the present situation as it is, when approximating as thin as an extent of 3 nm, a current flows by a direct tunneling phenomenon to lose function as an insulating film. This means that the thickness of the insulating film reaches the limit value where it is principally no longer thinned. Therefore, it is in extremely difficult situation to improve the current driving capability by thinning the gate insulating film.
On the other hand, for a requirement of further upgrade of function per one chip, a largeness of the chip is gradually larger in reverse around the fine promotion policy of the element. Followingly, a length of wiring for connecting each functional block is also lengthened. In view of the transistor for driving such wiring, the load to be driven comes larger in reverse to normally smaller with proceeding of the fine promotion planning. Accordingly, a strong demand is directed to the improvement of the current driving capability of the elements.
The transistor for driving such larger load requires an extremely higher current driving capability, thus following the equation (2), a channel width is also required as large as ranging from several 10 .mu.m to several 100 .mu.m. In particular, the transistor used in an output stage to an external circuit is to have an extremely larger channel width W.
FIGS. 8(a) to 8(c) are a schematic view showing the conventional transistor structure, (a) is a plan view, (b) a sectional view, and (c) an equivalent circuit.
In the drawings, numeral 801 depicts a gate electrode made of n.sup.+ polysilicon, 802 and 803 a source and a drain respectively, 804 a gate insulating film made of SiO.sub.2, and 805 a field oxide film.
The transistor described above, whose gate electrode itself is a RC distribution constant circuit, takes a finite time for transferring signals from the one end 806 to the other end 807 of the gate, see FIG. 8(c). FIG. 9 designates a state that, when applying high-frequency signals from one end of the gate, an amplitude of voltage is attenuated depending on propagation of the signals on the gate electrode. With the gate electrode having a larger resistance, the high-frequency component is attenuated, and the gate, which is allowed to have the larger width by all means, comes entirely impossible to effectively use.
Hence, the gate electrode must have a lower resistance as much as possible. For example, it may preferably be made of metal such as Al, whose melting point is 660.degree. C., and a thermal treatment therefor is required to perform at least at a temperature equal to or less than 450.degree. C. However, with the conventional ion injection procedure used, when an ion injected layer has an anneal temperature of 450.degree. C., a reverse direction leakage current of PN junction is equal to or more than 10.sup.-3 A/cm.sup.2, which entirely has been out of use.
Essentially, in the conventional transistor, the thinnered gate insulating film (SiO.sub.2) is unused by the direct tunneling current of the insulting film, and in addition, in the transistor having a larger gate width for driving a particular higher current, the finite time is needed for the transistor to turn ON one end to the other end thereof, which is thus extremely disadvantageous for realization of high speed operation for the circuit.
The present invention has been made for solving the problems. The invention is to provide a semiconductor device with a high driving capability of current and capable of realizing high speed operation of a circuit.